1. Field of the Invention
The invention generally relates to methods and apparatus for metallization in data storage devices for integrated circuits, and more particularly, to randomly accessible memory devices.
2. Description of the Related Art
Computers and other digital systems use memory to store programs and data. A common form of memory is random access memory (RAM). Many memory devices, such as dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices are volatile memories. A volatile memory loses its data when power is removed. For example, after a conventional personal computer is powered off, the volatile memory is typically reloaded through a boot up process upon a restart. In addition, certain volatile memories such as DRAM devices require periodic refresh cycles to retain data even when power is continuously supplied.
Nonvolatile memory devices retain data for long periods of time when power is removed. Examples of nonvolatile memory devices include read only memory (ROM), programmable read only memory (PROM), erasable PROM (EEPROM), electrically erasable PROM (EEPROM), flash memory, and the like. These memory devices are also randomly addressable memory devices. Disadvantageously, conventional nonvolatile memories are relatively large (physically), slow, and expensive. Further, conventional nonvolatile memories are relatively limited in write cycle capability and typically can only be programmed to store data about 10,000 times in a particular memory location. This prevents a conventional non-volatile memory device, such as a flash memory device, from being used as general purpose memory.
An alternative memory device is known as magnetoresistive random access memory (MRAM). An MRAM device uses magnetic orientations to retain data in its memory cells. Advantageously, MRAM devices are relatively fast, are nonvolatile, consume relatively little power, and do not suffer from restrictive write cycle limitations. There are many different types of MRAM devices.
In a giant magneto-resistance (GMR) MRAM cell, at least two ferromagnetic layers are separated by a non-magnetic layer. One of the ferromagnetic layers has a relatively high coercivity and is provided a fixed or “pinned” magnetic vector. The other ferromagnetic layer has a lower coercivity, wherein the orientation of its magnetic vector can be “varied” by a field not large enough to re-orient the pinned layer.
In a tunneling magneto-resistance (TMR) cell, the layer of non-magnetic material corresponds to a relatively thin layer of insulating material, which is made thin enough to permit electron tunneling, i.e., quantum mechanical tunneling of electrons from one of the ferromagnetic layers to the other. The passage of electrons through the stack of layered materials depends upon the orientation of the magnetic vector of the soft magnetic or variable layer relative to that of the pinned layer; electrons pass more freely when the magnetic vectors of the variable and pinned layers are aligned.
The demand for larger and larger memory devices is ever increasing. To meet the demand for larger memory, even more memory cells are packed into memory arrays of memory devices. This increases the number of electrodes for memory cells and interconnects for logic throughout the memory device. Electrodes and interconnects are typically fabricated by forming layers of interlayer dielectric (ILD) and layers of metallization. The fabrication of multiple layers of metallization can be time consuming and expensive.